A trace cache microarchitecture and evaluation
نویسندگان
چکیده
منابع مشابه
A Trace Cache Microarchitecture and Evaluation
As the instruction issue width of superscalar processors increases, instruction fetch bandwidth requirements will also increase. It will eventually become necessary to fetch multiple basic blocks per clock cycle. Conventional instruction caches hinder this effort because long instruction sequences are not always in contiguous cache locations. Trace caches overcome this limitation by caching tra...
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Instruction fetch mechanism is a performance bottleneck of a Superscalar Processor. Fetch performance can be improved with the aid of an instruction memory known as a Trace Cache. This paper presents analytical expressions, which describe instruction fetch performance of a Trace Cache microarchitecture. The instruction fetch rates predicted by the expressions differ by seven percent from the si...
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ژورنال
عنوان ژورنال: IEEE Transactions on Computers
سال: 1999
ISSN: 0018-9340
DOI: 10.1109/12.752652